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Sensor Integration and Signal processing Part I

SNR

Definition of SNR

What is a good sensor?

Definition: SNR

SNR (signal-to-noise ratio) : defined as the ratio of signal power to noise power, typically expressed in decibels (dB)

SNR=PsignalPnoiseSNR(dB)=10log10(PsignalPnoise).

Low Noise!

  • Electronic noise is a random fluctuation in an electrical signal, a characteristic of all electronic circuits.
  • Johnson–Nyquist noise (thermal noise, Johnson noise, or Nyquist noise) is the electronic noise generated by the thermal agitation of the charge carriers (usually the electrons) inside an electrical conductor at equilibrium.
  • Shot noise, flicker noise, burst/popcorn noise, Avalanche noise…

Wheatstone bridge*

How to improve the SNR:

  • Voltage divider: Vout=R/(R+RT)VDD
  • Wheatstone bridge
    • R3 is resistive sensor
    • R4 is matched to nominal value of R3
    • If R1=R2 and R4R3 (nominal), Voutnominal0
    • Vout varies as R3 changes
Wheatstone bridge
Figure 1: Wheatstone bridge.

For Wheatstone bridge: Assume:

R1=R2=R0,R3=R0(1+x+a),R4=R0(1+a),

where x: relative resistance change and a: common relative resistance drift. For the Midpoint Voltage:

VL=R4R1+R4Vexc=1+a2+aVexcVR=R3R2+R3Vexc=1+x+a2+x+aVexc.

Then:

Vout=VRVLx4Vexc

Common temperature drift can be compensated!

If the bridge circuit is balanced: Vout=0,VL=VR, then

R1R3=R2R4

Signal process

Fourier Transform

F(ω)=+f(t)ejωt dt=+f(t)cosωt dtj+f(t)sinωt dt

Analog low-pass filter

Impedance: Ohm’s law:

V=IZ

not U=IR (only for DC)

  • Resistor: ZR=R
  • Capacitor: ZC=1jωC; low impedance for high frequency
  • Inductor: ZC=jωL; high impedance for high frequency
RC filter
Figure 2: RC low-pass & high-pass filter.

Definition: Low-pass filters

In an ideal low-pass filter's, the frequency between pass and stop bands is called the cut-off frequency (ωc). All of the signals with frequencies below ωc are transmitted and all other signals are stopped.

Low-pass filter
Figure 3: Low-pass filter.

In practical filters, pass and stop bands are not clearly defined, |H(jω)| varies continuously from its maximum toward zero.

The cut-off frequency is, therefore, defined as the frequency at which |H(jω)| is reduced to 1/20.7 of its maximum value. This corresponds to signal power being reduced by 1/2 as PV2.

RL filter

RL filter
Figure 4: RL filter.
Vo=RR+jωLViH(jω)=VoVi=RR+jωL=11+j(ωL/R)

To find the cut-off frequency, we note

|H(jω)|=11+(ωL/R)2|H(jω)|max=1|H(jωc)|=|H(jω)|ω=ωc=12|H(jω)|max=1211+(ωcL/R)2=121+(ωcLR)2=2ωc=RL and H(jω)=11+jω/ωc

RC filter

RC filter
Figure 5: RC filter.
Vo=1/(jωC)R+1/(jωC)Vi=11+j(ωRC)ViH(jω)=11+jωRC

To find cut-off frequency (Similar to RL filter)

ωc=1RC and H(jω)=11+jω/ωc

RL and RC filters above are part of the family of first-order filters (they include only one capacitor or inductor). In general, the voltage transfer function of a first-order low-pass filter is in the form:

H(jω)=K1+jω/ωc,{For low-pass RL filters: ωc=RLFor low-pass RC filters: ωc=1RC

High-Pass Filter

High-pass filter
Figure 6: High-pass filter.
  • RC filter
H(jω)=VoVi=RR+1/(jωC)=11j(1/ωRC)ωc=1RC,H(jω)=11jωc/ω
  • RL filter
ωc=RL,H(jω)=11jωc/ω

DAQ

Definition: DAQ

Data acquisition (DAQ): is the process of sampling signals that measure real world physical conditions and converting the resulting samples into digital numeric values that can be manipulated by a computer.

  1. physical system
  2. Transducer sensor
  3. Signal conditioning
  4. Analog-Digital converter
  5. Computer

Example: A temperature control system

  • Thermal sensor (input)
  • Microcontroller (processor)
  • Electrical heater (output)

ADC

Definition: ADC

Analog-to-Digital converter (ADC, A/D, or A-to-D) is a system that converts an analog signal, such as a sound picked up by a microphone or light entering a digital camera, into a digital signal.

An ADC may also provide an isolated measurement such as an electronic device that converts an input analog voltage or current to a digital number representing the magnitude of the voltage or current.

Example: LM35

Sensor output is a voltage (analog signal)

LM35 is a low cost temperature sensor

  • Basic Centigrade (2°C to 150°C)
  • typical accuracy of 0.25°C at room temperature and 0.75°C for full range.
  • output voltage has a scale factor of 10 mV per degree
Vout=10 (mV/C)TemperatureADCresult=1024Vout/Vref
  • 10-bit ADC: divide Vref by 210
  • 0Vref converted to 0(2101)

When using Vref=3.3 V, we have

Temperature=ADCresult×330/1024.

Sensor resolution

Definition: resolution

The resolution of a sensor is the smallest change it can detect in the quantity that it is measuring.

The resolution of a sensor with a digital output is usually the resolution of the digital output.

The resolution is related to the precision with which the measurement is made, but they are not the same thing. A sensor's accuracy may be considerably worse than its resolution.

For example:

Temperature=ADCresult×330/1024Resolution: 1×330/10240.32 degree

The more bits an ADC has, the higher resolution we can achieve

Sampling

Definition

  • In signal processing, sampling is the reduction of a continuous-time signal to a discrete-time signal. A common example is the conversion of a sound wave (a continuous signal) to a sequence of samples (a discrete-time signal).
  • A sample is a value or set of values at a point in time and/or space. A sampler is a subsystem or operation that extracts samples from a continuous signal. A theoretical ideal sampler produces samples equivalent to the instantaneous value of the continuous signal at the desired points.
  • For functions that vary with time, let s(t) be a continuous function (or "signal") to be sampled, and let sampling be performed by measuring the value of the continuous function every T seconds, which is called the sampling interval or the sampling period. Then the sampled function is given by the sequence:
s(nT), for integar values of n.
  • The sampling frequency or sampling rate, fs, is the average number of samples obtained in one second (samples per second), thus fs=1/T.

Aliasing~

  • Aliasing: Output signal due to sampling frequency of the sensor?
  • An aliased signal provides a poor representation of the analog signal. Aliasing causes a false lower frequency component to appear in the sampled data of a signal.
Aliasing
Figure 7: Aliasing.

When x(t) is a function with a fourier transform X(f):

X(f)=+x(t)ei2πft dt.

The Poisson summation formula indicates that the samples are sufficient to create a periodic summation of X(f)

Xs(f)=k=X(fkfs)=k=Tx(nT)ei2πnTf

which is a periodic function and its equivalent representation as a Fourier series. This function is also known as the discrete-time Fourier transform (DTFT) of the sample sequence.

Any frequency component above fs/2 is s indistinguishable from a lower-frequency component, called an alias.

Two anti-aliasing solutions:

  1. Increase the sample rate to cover all frequencies, i.e., fs>2fN
  2. Use low pass filter: When the sample-rate is pre-determined by other considerations (such as an industry standard), x(t) is usually filtered to reduce its high frequencies to acceptable levels before it is sampled. The type of filter required is a lowpass filter, and in this application it is called an anti-aliasing filter.

Sampling Theorem

  • The Nyquist–Shannon sampling theorem serves as a fundamental bridge between continuous-time signals and discrete-time signals.
  • It establishes a sufficient condition for a sample rate that permits a discrete sequence of samples to capture all the information from a continuous-time signal of finite bandwidth.
  • Increasing the sampling frequency increases the number of data points acquired in a given time period.
  • A fast sampling frequency provides a better representation of the original signal than a slower sampling frequency.
  • For a given sampling frequency, the maximum frequency you can accurately represent without aliasing is the Nyquist frequency. The Nyquist frequency equals one-half the sampling frequency fN=fs/2 where fs is the sampling frequency.

DAC

Definition: DAC

Digital to Analog Converter (DAC) is a device that transforms digital data into an analog signal.

D/A Converter Architectures:

  • Weighted resistors method (the inverting summing amplifier)
    • simple design and low cost
    • As the number of bits is increasing, the range of the resistor values becomes large and accordingly, the accuracy becomes poor.
Weighted resistors method
Figure 8: Weighted resistors method.

This is a 4-bit DAC example:

V0=(8b3+4b2+2b1+b0)VrefR0/8R
  • R-2R ladder method
    • Only two value of resistors used
    • The actual value is less important
R-2R ladder method
Figure 9: R-2R ladder method.

Both methods are called the binary-weighted DAC

R-2R ladder method

explain R-2R ladder method
Figure 10: Explaination of R-2R ladder method.

R1 and R2 are connected in parallel, and this combination is in series with resistor R3. The equivalent resistance of these three resistors can be calculated, which is called RA:

RA=R3+R1×R2R1+R2=R+2R×2R2R+2R=R+R=2R.
explain2 R-2R ladder method
Figure 11: Explaination of R-2R ladder method.

Similarly:

RB=R5+RA×R4RA+R4=R+2R×2R2R+2R=R+R=2R.

And finally, RD=R, where RD is the resistor in the left.

  • The op-amp input is at virtual ground
  • Current into the op-amp stage:
I=VINR
  • Output voltage:
Vout=RFI=RFRVIN.
explain thevenin
Figure 12: Explaination of Thevenin equivalent voltage & resistance.

The two 2R resistors on the far left. One is connected to ground, the other to VA=+5 V.

  • Thevenin equivalent voltage (VTHA): These two 2R resistors form a voltage divider.
VTHA=VA×2R2R+2R=52=2.5 V.
  • Thevenin equivalent resistance (RTHA): Set the voltage source to zero (short circuit to ground), the equivalent resistance seen from node A is two 2R resistors in parallel.
RTHA=2R2R=R.

Similarly:

VTHB=VTHA×2R2R+2R=2.52=1.25 V,RTHB=2R2R=RVTHC=VTHB×2R2R+2R=1.252=0.625 V,RTHC=2R2R=RVOUT=VTHC×2R2R+2R=0.6252=0.3125 V,RTHOUT=2R2R=R.
explain2 thevenin
Figure 13: Explaination of Thevenin equivalent voltage & resistance.

Applications & limitations

Applications

  • Audio amplifier
  • Video encoder
  • Display electronics
  • Motion control

Limitations of binary-weighted DAC

  • Use multi-channel GPIO
  • It requires very accurate resistors, as the DAC would require that the error in each resistor be less than the smallest resistor value.
  • If n = 10, we need a resistor r=210×R,2N1×R,

PWM as DAC

PWM - pulse width modulation

  • control the speed of DC motor
  • control the brightness of LED

The duty cycle D is defined as the ratio between the pulse duration (τ) and the period (T) of a rectangular waveform:

Duty cycle D=τT.
diff-cycle
Figure 14: Different duty cycle.

Why PWM can work as DAC

  • Desired DAC voltage = A×duty cycle
  • A is the amplitude of the PWM (i.e., A=3.3 V for LPC1743 ARM processor)
  1. Fourier analysis of PWM as DAC voltage output: Assume we have a PWM: τ=5 μs,T=10 μsD=50%,A=3.3 V. frequency is 100 kHz; the rise and fall times are both 10 ns.

  2. Use a low-pass filter:

    • We want a stable 1.65 V; don’t want the troublesome highfrequency spike (i.e., 100 kHz,300 kHz, …)
    • Use a low-pass filter in a PWM DAC: the filter retains the DC component while suppressing everything else.
diff-cycle-f
Figure 15: Different duty cycle in frequency domain.

When ω0=2π/T:

f(t)=DA+n=1Ancos(nω0t+ϕn),An=2Anπ|sin(nπD)|.

Set n=1, Only fundamental frequency considered:

f(t)=DA+2Aπ|sin(πD)|cos(ω0t+ϕ1)
  • When D=10%:
f(t)=0.1A+0.197Acos(ω0t+ϕ1)
  • When D=50%:
f(t)=0.5A+0.637Acos(ω0t+ϕ1)

where 0.5A is the DC component

  • When D=90%:
f(t)=0.9A+0.197Acos(ω0t+ϕ1)

Trade-off:

  1. A lower cutoff frequency means less ripple and longer settling time; a higher cutoff frequency means more ripple and shorter settling time.
  2. Higher-order filters improve performance, but they also increase cost and complexity. Instead of spending time and money implementing a fancy filter for a mediocre PWM DAC, we should just use an external DAC!

An Easy Way to Improve PWM DAC: just increase the frequency of the PWM signal!

  • E.g., change 100 kHz to 10 MHz
  • Same RC filter with fc50 kHz, the settling time is only about 15 μs

Released under the MIT License.